Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our
Vision, Mission, and 11 Guiding Values
; we affectionately refer to it as the
Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
30 years of quarterly profitability
without a great team dedicated to empowering innovation. People like you.
Visit our
careers
page to see what exciting opportunities and company
perks
await!
Job Description:
The Timing and Communication Group (TCG) at Microchip is actively seeking an analog design engineer. The responsibility spans wide range of activities such as the design, simulation and validation of analog integrated circuits (ICs). The products are usually mixed signal SOC designs.
The Analog team develops the critical IP blocks used in the TCG timing products. These circuits include multi-GHz PLL circuits, high speed digital circuits, MEMS drivers and high-speed performance IO pads.
As an Analog Design Engineer and as part of the Analog IP team the individual will:
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Work with analog design lead and architects to design specific analog IP blocks
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Simulate analog circuits across process corners and operating conditions
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Models design blocks to be included on top level mixed signal simulations
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Block level validation of process silicon devices and system level lab evaluation
Requirements/Qualifications:
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Bachelor's or master’s degree in Electrical Engineering
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Minimum 5 years’ experience as an IC layout designer using deep submicron CMOS process technology
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Knowledge of chip level integration and ESD concepts is a plus
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Knowledge in scripting using SKILL language, Perl and TCL is a plus
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Strong knowledge in Cadence IC layout flow and tools
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Familiar with Innovus, is a plus
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Experience in layout verification and debugging such as DRC, ERC, LVS, ANTENNA DRC
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Floor planning from sub-block to chip top level
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Very good understanding of matching techniques
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Knowledge in TCL, Perl, Python and/or SKILL languages is a plus
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Good communication, teamwork skills and experience working with multi-site team desirable
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
i. 80% Sitting, 10% Walking, 10% Standing, Usual Business Hours
Pay Range:
The expected base salary range for this position, if filled in California, is $64,480 - $163,000, dependent on specific skills and work experience. We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below.
Benefits of working at Microchip
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the
For more information on applicable equal employment regulations, please refer to the
EEO is the Law Poster
and the
EEO is the Law Poster Supplement
. Please also refer to the
Pay Transparency Policy Statement
.
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