Senior RAN Integration Engineer

Full Time
Richardson, TX
Posted
Job description

Job Title: - Senior RAN Integration Engineer

Duration: - Full-time

Location: Richardson, TX (Dallas-Fort Worth)

Role Summary: -

  • As a PHY Integration Lead Engineer you will be responsible for leading the integration of PHY Layer functions onto various radio hardware platforms

Key Responsibilities
Specific responsibilities include: -

  • Development of PHY Integration framework, process, and automation tools for radio hardware platforms
  • Perform technical analysis to scope out the PHY functional integration and validation for radio platforms
  • Analysis of FPGA resource utilization, system capacity, and other constraints and recommend improvements to product design and architecture
  • Leading porting and implementation of core FPGA/SoC IP assets onto specific radio hardware platforms
  • Leading integration and functional validation of user, control plane functionalities of 4G/5G OpenRAN radios.
  • Support integration of OpenRAN radio with Radio Access Network (RAN) toward end-to-end 5G solution.
  • Create, maintain interfaces between radio PHY layer and other subsystems and RAN
  • Work with HW, FPGA and Software engineers to drive integration and timely release of radio products
  • Evaluate product specifications and test data against regulatory and compliance standards and help design teams to achieve performance and compliance metrics
  • Identify and pursue opportunities for innovation and optimization in the areas of PHY Layer integration
  • Provide support and guidance for product management and product development teams during the lifecycle of the product.

Job Requirements: -

  • Proven track record in developing FPGA based radio platform for 4G or 5G
  • Hands-on experience with FPGA design, implementation, verification and integration
  • Experience with Digital Signal Processing (DSP) and other Wireless Communication technologies
  • Experience and in-depth knowledge with one or more of the following: O-RAN Interface, GE Interface, Timing & Synchronization, PHY Layer, DPD, CFR, RX AGC, TX Power Control, and Beamforming
  • Familiarity with digital hardware design including FPGA/SoC is a plus
  • Familiarity with embedded software design and development is a plus
  • Good understanding of wireless networks, ORAN standards and 3GPP specifications for Radio interface
  • Fluent verbal and written communication skills in English

Job Type: Full-time

Salary: $120,000.00 - $135,000.00 per year

Work Location: One location

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